The present invention relates to complementary metal oxide semiconductors (CMOS), and more specifically, to CMOS nanowire devices.
CMOS is used for constructing integrated circuits. CMOS technology is used in microprocessors, microcontrollers, static random access memory (RAM), and other digital logic circuits. CMOS designs may use complementary and symmetrical pairs of p-type and n-type metal oxide semiconductor field effect transistors (MOSFETs) for logic functions.
As CMOS scales to smaller dimensions, nanowire devices provide advantages. Stacked nanowires provide area efficiency. Stacked nanowires provide, for example, increased drive current within a given layout area.